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TODO: add AR93xx support to ath9k

The AR93xx chipset family is the newest breed. These have support for 3-streams although some 2-stream solutions are also being produced. Support for this family is currently being addressed. Support for the 2-stream and 3-stream devices are now available. Only a few pending features are being developed now.

Status

AR9003 support has been completed for the 2.6.36 kernel release cycle.

Hardware code unification goals

Atheros intends on supporting all our 802.11 chipsets as best as possible upstream on the Linux kernel. To be able to support Atheros hardware as quickly as possible we need to make internal code changes to embrace Linux upstream coding style, and make a few architectural changes. Due to the large subsystem differences between the different Operating System systems Atheros supports and the rules for code upstream on the Linux kernel the only code which is expected to be shared is the hardware code, what Atheros typically calls the HAL.

Stylistic and architectural changes required to speed up bring up of newer chipsets have been reviewed and agreed upon for internal code changes on the Atheros HAL but the task at hand is quite large and will likely take a while to finalize. The end goal is to automate or minimize the process of hardware code integration from our own tree to the upstream Linux kernel as well as doing the same for integration of changes from the community back internally.

AR9003 features

Some features are implemented, a few others are still being worked on so can only be merged at a later time.

Key features already implemented:

• PAPrD - Preamplifier predistortion

• ANI upgrade, amongst other things it now supports MRC for CCK
• OFDM for spur mitigation - ar9003_hw_spur_mitigate_ofdm()
• EEPROM is now an on-chip OTP(One-Time-Programmable) and its contents are compressed
• Open-loop transmit power control
• TX IQ Calibration

• ML equalizer - enabled if you enable bit 12 on register AR_PHY_GEN_CTRL (0xa204). This is enabled through the initvals:

{0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0},

Enabling the ML equalizer should yield 3 dB performance gain for all MCS rates > 7 at all distances

• Internal switching regulator
• LDPC - partially reference implementation exists, requires work on mac80211 (HT IE capability and the driver
• STBC - work required on mac80211 (HT IE capability) and driver side, rate flag

Key features implemented on the HAL which are going to be ported next:

• MSI - 4 vectors (TX, two for RX and one other for all other interrupts)
• Fast channel change
• Rate control changes for 3 stream support - ath9k rc and minstrel
• AMSDU TX support (Felix is working on this)

Key features which we will need to wait for porting into ath9k:

• The new EEPROM format has a new GPIO control word being added, this can be added to ath9k once available on the HAL
• TxBF

• WAPI support. AR9003 supports the SMS4 encryption algorithm in hardware.

TX Beamforming

In order to help porting TX Beamforming support into ath9k for AR9003 HAL unification goals are starting to be applied to the Atheros HAL. The gaol is to get the code as close as possible to upstream-acceptable and address only a few minor items through scripts. We want to avoid manual port work at least for the HAL components. See the HAL unification objectives above for more information.

WAPI

AR9003 supports the SMS4 encryption algorithm in hardware. mac80211 now supports to deal with private hardware ciphers, this should be enough to allow us to use a supplicant with WAPI support. See the WAPI for more details.

Fixes TODO

• Add a return value for ath_tx_start_dma() since ath_tx_txqaddbuf() can now fail for EDMA
• Why does ath9k_hw_numtxpending() (ar9300NumTxPending() in the HAL) use AR_Q_TXE on a special case, though AR9003 hardware can ignore TXE now?